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Fast Fourier Transform

References

Several papers are available describing some of the FFT features:

•  “A New Class of High Performance FFTs” describes Centar’s first “demonstration” 16-bit 256-point and 1024-point FPGA circuit designs (associated presentation).

• “A High Performance Scalable FFT” and "An FFT for Wireless Protocols" are papers that focus on the FPGA circuit design of a 256-point FFT and its application to 4G wireless systems.  (Corresponding presentations are here and here.)

• " A High Performance Block Floating Point Systolic FFT Not Limited to Powers of Two " and “Computationally Efficient Systolic Architecture for Computing the Discreet Fourier Transform” focuses on the algorithm derivation and architecture.  In addition a PowerPoint presentation are available summarizing the architecture in more visual form.

• "Constraint Directed CAD Tool For Automatic Latency-Optimal Implementation of 1-D and 2-D Fourier Transforms"  deals primarily with issues related to use of a CAD tool to automatically derive the base-4 systolic architecture.